Jump to content

COL719: Difference between revisions

From IITD Wiki
[checked revision][checked revision]
Creating course page via bot
 
Bot: wrap bare course codes in wikilinks
 
Line 4: Line 4:
| credits = 4
| credits = 4
| credit_structure = 3-0-2
| credit_structure = 3-0-2
| pre_requisites = COL215 OR Equivalent
| pre_requisites = [[COL215]] OR Equivalent
| overlaps =  
| overlaps =  
}}
}}

Latest revision as of 16:26, 14 April 2026

COL719
Synthesis of Digital Systems
Credits 4
Structure 3-0-2
Pre-requisites COL215 OR Equivalent
Overlaps

COL719 : Synthesis of Digital Systems

After a basic overview of the VLSI design flow, hardware modelling principles and hardware description using the VHDL language are covered. This is followed by a study of the major steps involved in behavioural synthesis: scheduling, allocation, and binding. This is followed by register-transfer level synthesis, which includes retiming Courses of Study 2024-2025 Computer Science and Engineering 162and Finite State Machine encoding. Logic synthesis, consisting of combinational logic optimisation and technology mapping, is covered next. Popular chip architectures - standard cells and FPGA are introduced. The course concludes with a brief overview of layout synthesis topics: placement and routing.