https://wiki.devclub.in/index.php?action=history&feed=atom&title=COL719COL719 - Revision history2026-04-09T06:03:00ZRevision history for this page on the wikiMediaWiki 1.45.1https://wiki.devclub.in/index.php?title=COL719&diff=571&oldid=prevPrashantt492: Creating course page via bot2026-03-04T09:59:55Z<p>Creating course page via bot</p>
<p><b>New page</b></p><div>{{Infobox Course<br />
| code = COL719<br />
| name = Synthesis of Digital Systems<br />
| credits = 4<br />
| credit_structure = 3-0-2<br />
| pre_requisites = COL215 OR Equivalent<br />
| overlaps = <br />
}}<br />
<br />
== COL719 : Synthesis of Digital Systems ==<br />
After a basic overview of the VLSI design flow, hardware modelling principles and hardware description using the VHDL language are covered. This is followed by a study of the major steps involved in behavioural synthesis: scheduling, allocation, and binding. This is followed by register-transfer level synthesis, which includes retiming Courses of Study 2024-2025 Computer Science and Engineering 162and Finite State Machine encoding. Logic synthesis, consisting of combinational logic optimisation and technology mapping, is covered next. Popular chip architectures - standard cells and FPGA are introduced. The course concludes with a brief overview of layout synthesis topics: placement and routing.</div>Prashantt492